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  jun. 2007 mitsubishi pm50b4la060 flat-base type insulated package pm50b4la060 feature a) adopting new 5th generation igbt (cstbt tm ) chip, which performance is improved by 1 m fine rule process. for example, typical v ce (sat)=1.55v @tj=125 c b) over-temperature protection by detecting tj of the cstbt tm chips and error output is possible from all each conserva- tion upper and lower arm of ipm. c) new small package reduce the package size by 10%, thickness by 22% from s-dash series. ? 50a, 600v current-sense igbt type inverter monolithic gate drive & protection logic detection, protection & status indication circuits for, short- circuit, over-temperature & under-voltage (p-fo available from upper arm devices) ul recognized y ellow card no.e80276(n) file no.e80271 application photo voltaic power conditioner package outlines dimensions in mm 1. vupc 2. ufo 3. up 4. vup1 5. vvpc 6. vfo 7. vp 15. nc 16. un 17. vn 18. nc 19. fo 8. vvp1 9. nc 10. nc 11. nc 12. nc 13. vnc 14. vn1 te r minal code 106 19.75 3.25 7 16 15.25 2- 5.5 6-m5 nuts mounting holes l a b e l 6-2 3-2 3-2 3-2 b np uvw 10.75 7 12 (screwing depth) 19- 0.5 32.75 23 23 23 13 31 55 32 13.5 3 16 17.5 17.5 (19.75) 12 14.5 16 16 120 11 1591319 12 22 + 1 0.5 2- 2.5 11.75
mitsubishi pm50b4la060 flat-base type insulated package jun. 2007 2 600 50 100 134 ?0 ~ +150 ratings v ces i c i cp p c t j collector-emitter voltage collector current collector current (peak) collector dissipation junction temperature v d = 15v, v cin = 15v t c = 25 c t c = 25 c t c = 25 c v a a w c maximum ratings (tj = 25 c, unless otherwise noted) inverter part symbol parameter condition unit internal functions block diagram control part supply voltage input voltage fault output supply voltage fault output current applied between : v up1 -v upc v vp1 -v vpc , v n1 -v nc applied between : u p -v upc , v p -v vpc u n ?v n -v nc applied between : u fo -v upc , v fo -v vpc , f o -v nc sink current at u fo , v fo , f o terminals 20 20 20 20 v d v cin v fo i fo v v v ma gnd in fo vcc gnd sc out ot up gnd in fo vcc gnd sc out ot n gnd in fo vcc gnd sc out ot w gnd in fo vcc gnd sc out ot v b up v up1 uf o v upc un vn v n1 nc v nc vp v vp1 vf o 1.5k 1.5k 1.5k nc v vpc nc nc nc nc ratings condition unit symbol parameter
mitsubishi pm50b4la060 flat-base type insulated package jun. 2007 3 parameter symbol supply voltage protected by sc supply voltage (surge) storage temperature isolation voltage condition v cc(surge) t stg v iso ratings v cc(prot) 450 500 ?0 ~ +125 2500 unit v c v rms v v d = 13.5 ~ 16.5v, inverter part, t j = +125 c start applied between : p-n, surge value 60hz, sinusoidal, charged part to base, ac 1 min. 2.3 2.0 3.3 1.4 0.2 0.4 1.8 0.2 1 10 min. typ. max. collector-emitter saturation voltage collector-emitter cutoff current ? c = 50a, v d = 15v, v cin = 15v (fig. 2) t j = 25 c t j = 125 c electrical characteristics (tj = 25 c, unless otherwise noted) inverter part parameter symbol condition v ce(sat) i ces v ec t on t rr t c(on) t off t c(off) limits 0.3 1.7 1.55 2.2 0.7 0.1 0.2 0.9 0.2 t j = 25 c t j = 125 c fwdi forward voltage switching time v d = 15v, v cin = 0v ? 15v v cc = 300v, i c = 50a t j = 125 c inductive load (fig. 3,4) v ce = v ces , v cin = 15v (fig. 5) v d = 15v, i c = 50a v cin = 0v (fig. 1) to ta l system v ma v s unit 0.93 1.57 0.038 c/w r th(j-c)q r th(j-c)f r th(c-f) inverter igbt part (per 1/4 module) (note-1) inverter fwdi part (per 1/4 module) (note-1) case to fin, (per 1 module) thermal grease applied (note-1) symbol condition unit min. junction to case thermal resistances thermal resistances contact thermal resistance (note-1) tc (under the chip) measurement point is below. parameter limits t yp. max. up igbt 30.2 ?.9 vp un vn fwdi 30.7 ?.1 igbt 59.0 ?.9 fwdi 59.5 ?.1 igbt 38.2 6.5 fwdi 39.8 ?.3 igbt 50.9 6.5 fwdi 49.4 ?.3 arm axis x y (unit : mm) bottom view
mitsubishi pm50b4la060 flat-base type insulated package jun. 2007 4 v d = 15v detect t j of igbt chip ?0 t j 125 c v d = 15v, v fo = 15v (note-2) v d = 15v (note-2) v th(on) v th(off) sc t off(sc) ot ot r uv uv r i fo(h) i fo(l) t fo t rip level reset level t rip level reset level ?0 t j 125 c, v d = 15v (fig. 3,6) v d = 15v (fig. 3,6) 3.5 3.5 main terminal screw : m5 mounting part screw : m5 symbol parameter mounting torque mounting torque w eight condition unit n ?m n ?m g limits min. t yp. max. 2.5 2.5 3.0 3.0 380 mechanical ratings and characteristics v d = 15v, v cin = 15v applied between : u p -v upc , v p -v vpc u n ?v n -v nc i d c v ma ms 20 10 1.8 2.3 12.5 0.01 15 ma circuit current input on threshold voltage input off threshold voltage short circuit trip level short circuit current delay t ime over temperature protection supply circuit under-voltage protection fault output current minimum fault output pulse width control part 1.2 1.7 100 135 1 1.5 1.0 parameter symbol condition max. min. typ. unit limits 10 5 1.5 2.0 0.2 145 125 12.0 12.5 10 1.8 (note-2) fault output is given only when the internal sc, ot & uv protections schemes of either upper or lower arm device operat e to protect it. v s v n1 -v nc v *p1 -v *pc a recommended conditions for use recommended value unit condition symbol parameter v applied across p-n terminals applied between : v up1 -v upc , v vp1 -v vpc v n1 -v nc (note-3) applied between : u p -v upc , v p -v vpc u n ?v n -v nc using application circuit of fig. 8 for ipms each input signals (fig. 7) supply voltage control supply voltage input on voltage input off voltage pwm input frequency arm short-through blocking time 450 15 1.5 0.8 9.0 20 2.0 v cc v cin(on) v cin(off) f pwm t dead v d v khz s v (note-3) with ripple satisfying the following conditions : dv/dt swing 5v/ s, variation 2v peak to peak
mitsubishi pm50b4la060 flat-base type insulated package jun. 2007 5 precautions for testing 1. before appling any control supply voltage (v d ), the input terminals should be pulled up by resistores, etc. to their corre- sponding supply voltage and each input signal should be kept off state. after this, the specified on and off level setting for each input signal should be done. 2. when performing ?c?tests, the turn-off surge voltage spike at the corresponding protection operation should not be al- lowed to rise above v ces rating of the device. (these test should not be done by using a curve tracer or its equivalent.) p, (u,v) u,v, (n) u,v, (n) v d (all) in fo in fo v d (all) v cin (0v) ic v v p, (u,v) v cin (15v) ic fig. 7 dead time measurement point example fig. 1 v ce(sat) test fig. 2 v ec test 0v 1.5v 1.5v 1.5v 2v 2v 2v 0v t t t dead t dead t dead 1.5v: input on threshold voltage vth(on) typical value, 2v: input off threshold voltage vth(off) typical value ipm?input signal v cin (upper arm) ipm?input signal v cin (lower arm) 10% 90% trr irr tr td(on) tc(on) tc(off) td(off) v cin ic v ce 10% 10% 10% 90% tf (ton= td(on) + tr) (toff= td(off) + tf) fo fo p n n c s c s u,v vcc vcc ic ic v d (all) v d (all) p u,v v cin v cin v cin ( 15v ) v cin ( 15v ) fo fo fig. 3 switching time and sc test circuit fig. 4 switching time test waveform a) lower arm switching signal input (upper arm) signal input (lower arm) signal input (upper arm) signal input (lower arm) b) upper arm switching v cin fig. 5 i ces test fig. 6 sc test waveform sc trip short circuit current toff(sc) v d (all) u,v, (n) p, (u,v) a pulse v ce v cin (15v) ic fo in fo constant current
mitsubishi pm50b4la060 flat-base type insulated package jun. 2007 6 notes for stable and safe operation ; design the pcb pattern to minimize wiring length between opto-coupler and ipms input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. connect low impedance capacitor between the vcc and gnd terminal of each fast switching opto-coupler. fast switching opto-couplers: t plh , t phl 0.8 s, use high cmr type. slow switching opto-coupler: ctr > 100% use 3 isolated control power supplies (v d ). also, care should be taken to minimize the instantaneous voltage charge of the power supply. make inductance of dc bus line as small as possible, and minimize surge voltage using snubber capacitor between p and n terminal. fig. 8 application example circuit out sc ot gnd gnd in vcc u ac output v w n b p ~ i f fo out sc ot gnd gnd in vcc fo out sc ot gnd gnd in vcc fo out sc ot gnd gnd in vcc fo 20k 1.5k 1.5k 1.5k 0.1 10 uf o v up1 up v upc i f 20k 20k 0.1 10 i f 0.1 10 vf o v vp1 vp un 20k i f 0.1 10 vn v n1 nc v nc f o nc v vpc nc nc nc nc
mitsubishi pm50b4la060 flat-base type insulated package jun. 2007 7 performance curves 10 0 23 57 10 1 23 57 10 2 30 40 20 60 50 10 0 0 1 0.5 1.5 2 t j = 25 c 15v 13v v d = 17v 2 1.5 1 0.5 0 0 10 20 30 40 50 60 v d = 15v t j = 25 c t j = 125 c 2 1.5 1 0.5 0 18 13 12 15 14 17 16 i c = 50a t j = 25 c t j = 125 c 10 ? 10 0 7 5 3 2 10 0 10 ? 7 5 3 2 23 57 10 1 23 57 10 2 t c(on) v cc = 300v v d = 15v t j = 25 c t j = 125 c inductive load t c(off) t c(off) 10 ? 10 1 7 5 3 2 10 0 7 5 3 2 t off v cc = 300v v d = 15v t j = 25 c t j = 125 c inductive load t on t on t off 10 0 23 57 10 1 23 57 10 2 10 ? 10 1 10 ? 10 0 7 5 3 2 7 5 3 2 7 5 3 2 e sw(on) e sw(off) e sw(off) v cc = 300v v d = 15v t j = 25 c t j = 125 c inductive load collector-emitter saturation voltage v ce (sat) (v) collector-emitter saturation voltage (vs. ic) characteristics (typical) collector current i c (a) collector-emitter saturation voltage (vs. v d ) characteristics (typical) output characteristics (typical) collector current i c (a) collector-emitter saturation voltage v ce (sat) (v) collector-emitter saturation voltage v ce (sat) (v) control supply voltage v d (v) switching time characteristics (typical) switching time t c(on) , t c(off) ( s) collector current i c (a) switching time t on , t off ( s) switching time characteristics (typical) collector current i c (a) collector current i c (a) switching loss characteristics (typical) switching loss e sw(on) , e sw(off) (mj/pulse)
mitsubishi pm50b4la060 flat-base type insulated package jun. 2007 8 10 ? 10 0 7 5 3 2 10 ? 7 5 3 2 10 ? 7 5 3 2 10 ? 23 57 10 ? 23 57 10 ? 10 ? 23 57 10 ? 23 57 23 57 10 0 23 57 10 1 10 ? 10 0 7 5 3 2 10 ? 7 5 3 2 10 ? 7 5 3 2 10 ? 23 57 10 ? 23 57 10 ? 10 ? 23 57 10 ? 23 57 23 57 10 0 23 57 10 1 10 0 23 57 10 1 23 57 10 2 10 ? 10 ? 7 5 3 2 10 0 7 5 3 2 10 1 7 5 3 2 10 ? 10 0 7 5 3 2 10 1 7 5 3 2 10 2 7 5 3 2 10 0 10 2 7 5 3 2 0 10 1 7 5 3 2 0.5 1 1.5 2 2.5 v d = 15v t j = 25 c t j = 125 c i rr v cc = 300v v d = 15v t j = 25 c t j = 125 c inductive load t rr 10 0 23 57 10 1 23 57 10 2 10 ? 10 ? 7 5 3 2 10 ? 7 5 3 2 10 0 7 5 3 2 v cc = 300v v d = 15v t j = 25 c t j = 125 c inductive load e rr single pulse per unit base = r th(j ?c)q = 0.93 c/ w single pulse per unit base = r th(j ?c)f = 1.57 c/ w collector reverse current ? c (a) emitter-collector voltage v ec (v) fwdi forward voltage characteristics (typical) reverse recovery loss e rr (mj/pulse) collector reverse current i c (a) fwdi reverse recovery loss characteristics (typical) fwdi reverse recovery characteristics (typical) collector current i c (a) reverse recovery time t rr ( s) reverse recovery current l rr (a) time (s) transient thermal impedance characteristics (igbt part) normalized transient thermal impedance z th (j ?c) time (s) transient thermal impedance characteristics (fwdi part) normalized transient thermal impedance z th (j ?c)


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